Register constraints for construction of low power VLSI circuits
摘要
The power management is performed so that a sequence control system is intended to minimize unnecessary switching activity that leads to energy loss . The circuit operation is synthesized to optimize the register and multiplexing structure of the system. Observations during the synthesizing process allow the unnecessary operations to be identified. An Independent claim is provided for a synthesizing system.
申请公布号
DE19860062(A1)
申请公布日期
1999.07.01
申请号
DE19981060062
申请日期
1998.12.23
申请人
NEC CORP., TOKIO/TOKYO, JP;PRINCETON UNIVERSITY, PRINCETON, N.J., US