发明名称 Processor for converting pixel number of video signal and display apparatus using the same
摘要 A video signal processor which includes a circuit (108) for converting the number of lines in a digitized video signal, a circuit (109) for generating a display dot clock, a circuit (110) for outputting analog pixel data subjected to a line number conversion and having a frequency different from that of the display dot clock, and a circuit (111) for smoothing the analog pixel data; and in which a frequency fck of the display dot clock, an output frequency frk of the analog pixel data and a frequency fho of the horizontal synchronization signal satisfies an equation; <MATH> where M and N are natural numbers satisfying M NOTEQUAL N.e
申请公布号 EP0803855(A3) 申请公布日期 1999.06.16
申请号 EP19970106459 申请日期 1997.04.18
申请人 HITACHI, LTD. 发明人 NAKA, KAZUTAKA;MARUYAMA, ATSUSHI;URATA, HIROYUKI;TAKATA, HARUKI
分类号 G09G3/36;G06T3/40;G09G3/20;G09G5/00;G09G5/18;G09G5/36;H04N1/409;H04N5/66 主分类号 G09G3/36
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