发明名称 LOAD CIRCUIT FOR INTEGRATED CIRCUIT TESTER
摘要 <p>A load circuit (54) for an integrated circuit tester provides an adjustable load at a terminal of an integrated circuit device under test (DUT) when the DUT is generating an output signal at the terminal. The load circuit includes positive and negative current sources (64, 66) for producing positive and negative currents of magnitudes that are non-linear functions of input reference voltages. A diode quad (62A-62D) connects the negative current source (66) to the DUT terminal when the DUT output signal is below the threshold voltage (Vth) and connects the positive current source (64) to the DUT terminal when the DUT output signal is above the threshold voltage (Vth). The current sources (64, 66) provide a non linear, exponential, transfer function between input reference voltage and output current magnitude so that the current sources (64, 66) provide a relatively wide output current range in response to a relatively narrow input reference voltage range.</p>
申请公布号 WO1999010752(A1) 申请公布日期 1999.03.04
申请号 US1998017349 申请日期 1998.08.20
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