发明名称 WEIGHTED ROUND-ROBIN MULTIPLEXING OF ATM CELLS BY UPDATING WEIGHTS WITH COUNTER OUTPUTS
摘要 <p>In an ATM network node, cells of different service classes are stored in respective buffers and counters respectively associated with the buffers are initially loaded with full-count values respectively corresponding to the weight valeus of the service classes. The initial full-count values are updated respectively with the output values of the associated counters. Control circuitry sequentially interrogates the buffers and the counters in a round-robin fashion. If the output value of each interrogated counter is not decremented to a predetermined value, a cell is forwarded from the associated buffer and the counter is decremented by one. At the end of a round robin cycle, all of the counters are reloaded with the initial full-count values or the updated full-count values depending on the number of cells forwarded from each of the buffers.</p>
申请公布号 CA2226319(A1) 申请公布日期 1998.07.07
申请号 CA19982226319 申请日期 1998.01.06
申请人 NEC CORPORATION 发明人 SHIMONISHI, HIDEYUKI
分类号 H04Q3/00;H04L12/801;H04L12/865;H04L12/911;(IPC1-7):H04L12/56 主分类号 H04Q3/00
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