| 摘要 |
A DRAM with a vertical channel structure is manufactured with an epitaxial silicon layer, above a silicon substrate, and is preformed with a source region. A well is formed in the epitaxial silicon layer. A trench is formed to penetrate into the source region. A first insulating layer is formed on a surface of the trench and then a gate is formed, almost completely filling up the remaining space in the trench. A drain region is formed inside the well. A storage capacitor is formed above the drain region.
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