发明名称 PROGRAMMABLE AND CONVERTIBLE NONVOLATILE MEMORY ARRAY
摘要 <p>PROBLEM TO BE SOLVED: To erase a memory array by applying an address signal to a selected row line, grounding an unselected row line, impressing a positive voltage V on a selected column line and detaching an unselected column line from the sensor amplifier. SOLUTION: The X-address recorder 16 responds to a row address signal 17, applies it to a selected row line Xa and grounds an unselected row line 15. Next, the Y address recorder 21 responds to an address signal 23, applies it to a selected row line 22a, and makes the transistor 19a on to impress a positive voltage Vsen on a row line 18a. An unselected row line 18 permits to become floating and is disconnected from the sensor amplifier. The grounding selection circuit 29 makes the transistor 27a on to ground a specific column line 25. The others are all connected to a voltage Vx. At the same time, the line 7a makes the transistor 26 off to bring all unselected column lines 25 to Vx. By this the memory cell array is selectively erased.</p>
申请公布号 JPH09167497(A) 申请公布日期 1997.06.24
申请号 JP19960191191 申请日期 1996.07.19
申请人 TEXAS INSTR INC (TI) 发明人 JIYOBANNI SANTEIN;GIURIO MAROTSUTA;PIETORO PIERUSHIMONI;KURISUTEINA RATSUTARO;MAIKURU SHII SUMEIRINGU
分类号 G11C17/00;G11C16/02;G11C16/14;H01L21/8247;H01L27/105;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C16/06;H01L21/824 主分类号 G11C17/00
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