发明名称 Transistor mit Spannungsbegrenzungsanordnung
摘要 A power transistor takes advantage of the lower breakdown voltage capability of a spherical junction. A clamping region (40) having a spherical shape is provided in the gate region of an enclosed transistor cell (42). The clamping region (40) has a lower breakdown voltage than do the active portions of the transistor cell (42). Both a DMOSFET and an IGBT transistor may be provided with the clamping region (40) (a MOS-controlled thyristor is also disclosed). The clamping region (40) is a zener diode in the case of the DMOSFET, and is a bipolar junction transistor in the case of the insulated gate bipolar transistor. The clamping region (40) is preferably an island in the center of each cell of a closed cell structure.
申请公布号 DE69029180(T2) 申请公布日期 1997.05.22
申请号 DE1990629180T 申请日期 1990.08.29
申请人 SILICONIX INC., SANTA CLARA, CALIF., US 发明人 YILMAZ, HAMZA, SARATOGA, CALIFORNIA 95070, US;BENCUYA, IZAK, SAN JOSE, CALIFORNIA 95129, US
分类号 H01L21/331;H01L21/336;H01L27/04;H01L29/06;H01L29/10;H01L29/423;H01L29/739;H01L29/745;H01L29/78 主分类号 H01L21/331
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