RATIONAL FREQUENCY DIVIDER AND FREQUENCY SYNTHESIZER USING THE FREQUENCY DIVIDER

摘要

A rational frequency divider which has a simple constitution, whose spurious is little, and which has a wide frequency modulation width. A frequency synthesizer using the frequency divider is provided with an arithmetic circuit (21) which sends a frequency dividing ratio to a frequency divider (6) in a PLL circuit composed of a variable frequency oscillator (4), the frequency divider (6), and a phase detector (2). The arithmetic circuit (21) comprises a plurality of accumulating adders (22) which are connected in series and includes the first accumulating adder to which a rational number composed of an integral value and a decimal value is inputted, an integral value extracting circuit (23) which extracts the integral value from the output value of the last accumulating adder, and a delay circuit (24) which sends the integral value extracted by the circuit (23) to the frequency divider (6) as the frequency dividing ratio and to each accumulating adder as a feedback value. Each accumulating adder adds a value calculated which the adder calculates itself in the preceding clock period to the inputted rational number or the output value of the adder of the preceding stage, subtract the feedback value from the circuit (24) from the sum. In the synthesizer, the rational frequency divider is composed of the frequency divider (6) and arithmetic circuit (21, 21a and 21b).