| 摘要 |
<p>Input data signals inputted to a data input terminal (1) are supplied to an FIR digital filter (4) having a low-pass characteristic through a memory (2). The memory (2) is controlled by a control circuit (6), and the data immediately before and after the data which include an error are supplied to the filter (4). The filter (4) extracts values A and B, an interpolating data generating circuit (7) carries out arithmetic operation of the values A, B, by a prescribed value Y0 and a resultant value is taken out. The data before and after the data including the error are supplied to the filter (4), and a value A0 is taken out. To the value A0 is added values Bn obtained by supplying all the interpolation data which the data including the error take on. The sums of the value A0 and the values Bn are compared with the value Y0. Interpolatin data are generated from the Bn at which the sum is the closest to the value Y0. Data after interpolation by a data selector are taken out from a data output terminal (8). Therefore, interpolation of digital signals can be performed with a small number of arbitrary bits. <IMAGE></p> |
