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发明名称
Verfahren zum Anordnen von Komponenten in einer Halbleitervorrichtung
摘要
申请公布号
DE69027239(T2)
申请公布日期
1996.10.02
申请号
DE19906027239T
申请日期
1990.03.15
申请人
FUJITSU LTD., KAWASAKI, KANAGAWA, JP;FUJITSU VLSI LTD., KASUGAI, AICHI, JP
发明人
NISHIOKA, SEISHI, KASUGAI-SHI AICHI 487, JP;OKADA, ATSUHIKO, KASUGAI-SHI AICHI 487, JP
分类号
H01L21/822;G06F17/50;H01L21/82;H01L27/02;H01L27/04;H01L27/118;(IPC1-7):H01L27/02
主分类号
H01L21/822
代理机构
代理人
主权项
地址
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