| 摘要 |
<p>An encoder includes a control bit insertion circuit (12) for inserting a control bit into input data, which is then subjected to I-NRZ modulation by a precoder (14) to generate a reference code. The reference code is given to a 4-code generation circuit (22) through a delay circuit (16), and frequency components of the reference code, and first, second and third codes generated on the basis of the reference code are detected by a frequency detector (18). The frequency components are given to a judge circuit (20) such that it is determined whether the frequency components are large or small. A judge signal is applied to the 4-code generation circuit and a frequency detector from the judge circuit. The 4-code generation circuit selectively outputs one selected from the reference code and the first to third codes on the basis of the judgement signal. <IMAGE></p> |
