Semiconductor cavity filling process

摘要

An improved process is provided which allows for enhanced filling of contacts, vias (600 and trenches (80) that are formed in dielectrics (62) of integrated circuits, particularly sub-0.5 mu m technologies. In a preferred aspect of the invention, filling proceeds at a temperature of about 250 @ @ -450 @ in a vacuum of about 10<-6> - 10<-8> TORR and a processing pressure of about 300 - 1,000 atmospheres. The process of the present invention is applicable for different metals and metal alloys, adjustments to the processing parameters being undertaken in accordance with the various chemical and physical properties of the material to be filled in the respective contacts, vias (60) or trenches (80). <IMAGE>