Vorrichtung mit complementäre integrierte Schaltung mit Mitteln zur Verhinderung einer parasitären Auslösung

摘要

A complementary integrated circuit device is disclosed which includes a semiconductor substrate having a first area in which a plurality of first transistors are formed and a second area in which a plurality of second transistors are formed, each of the first transistors being larger in size than each of the second transistors. A guard ring region is formed in the substrate to surround the first area. The guard ring region is supplied with a power voltage via a first conductor line which is formed separately from a second conductor line supplying the power voltage to each of the first transistors.