| 摘要 |
PURPOSE: To improve the followup characteristic of the oscillator by extending the range of phase difference recognized normally by a phase comparator in a phase locked oscillator extracting a clock signal from received data. CONSTITUTION: An Up signal is set till a clock signal CLK reaches +π from a time when an edge of a reception signal Data is detected, and a Down signal is set till the signal CLK reaches +πfrom a time 0. When the edge of the detected signal Data and the position of the signal CLK are arranged, the Up/ Down signals are set simultaneously and kept for the same period. When the edge position detected from the reception signal Data is earlier than the phase of the signal CLK, the Up signal is set early and kept for a longer time than the Down signal. Conversely when the edge position is delayed more than the phase of the signal CLK, the Up signal is set with a delay. That is, the Up/ Down signals are operated by using a charge current source 2a and a discharge current source 2b of a charge pump 2 and the generated current is stored in a capacitor 2c as a charge. |
