摘要 |
A phase lock loop frequency synthesizer is applied to radio communication devices or the like, in order to reduce frequency error at a time of frequency changing, and considerably reduce a frequency changing time. At the time of frequency changing, a first loop filter performs frequency coarse adjustment, and charges or discharges a capacitor in a second loop filter to voltage corresponding to target frequency. Further, a controller feeds a voltage controlled oscillator with a frequency fine control data so as to output the target frequency, and controls a loop filter in a phase lock loop to be switched over from the first loop filter to the second loop filter.
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