发明名称 Phase lock loop frequency synthesizer
摘要 A phase lock loop frequency synthesizer is applied to radio communication devices or the like, in order to reduce frequency error at a time of frequency changing, and considerably reduce a frequency changing time. At the time of frequency changing, a first loop filter performs frequency coarse adjustment, and charges or discharges a capacitor in a second loop filter to voltage corresponding to target frequency. Further, a controller feeds a voltage controlled oscillator with a frequency fine control data so as to output the target frequency, and controls a loop filter in a phase lock loop to be switched over from the first loop filter to the second loop filter.
申请公布号 US5461344(A) 申请公布日期 1995.10.24
申请号 US19930144523 申请日期 1993.11.02
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 ANDOH, AKIRA
分类号 H03L7/089;H03L7/107;H03L7/187;H03L7/189;H03L7/199;(IPC1-7):H03L7/187 主分类号 H03L7/089
代理机构 代理人
主权项
地址