| 摘要 |
<p>A covert flight data processor is shown including a collection of integrated flight processing hardware and procedures. The processor devices are interconnected by a corresponding collection of bus structures providing appropriate and direct connectivity between specific hardware devices and control processes to more efficiently implement covert flight functions such as navigation and position determination, terrain following flight, terrain avoidance flight, obstacle avoidance, threat avoidance, and various video displays supporting covert mission flights. The basic architecture of the flight data processor and data flow diagrams are shown illustrating the connectivity of various covert flight support devices and the type of data generated by and flowing between such devices.</p> |
