发明名称 POLYNOMIAL MULTIPLYING CIRCUIT
摘要 PURPOSE:To accelerate arithmetic computation by shortening the arithmetic time by continuously executing the multiplication of polynomials by composing plural arithmetic elements, which output the products and sums of plural inputs, of a two-dimensional array. CONSTITUTION:An arithmetic element 1 is composed of a selector, multiplier, adder and register or the like and outputs the product and sum of a first input C and second and third inputs B and J. This arithmetic element 1 is arranged longitudinally for (a) columns and laterally for (b) steps, and the respective arithmetic elements 1 are connected so that the (i-1)th degree coefficient of a given (a-1)th degree polynomial lambda(x) and the (j-1)th degree coefficient of a given (b-1)th degree polynomial S(x) can be second and third inputs B and J at the arithmetic element 1 arranged at the i-th column and j-th step when the output of the arithmetic element 1 arranged at the (i+1)th column and the (j-1)th steps is the first input C. Then, a general polynomial M(x)=lambda(x).S(x) not having x<->b as the modulus is calculated.
申请公布号 JPH07121390(A) 申请公布日期 1995.05.12
申请号 JP19930291351 申请日期 1993.10.27
申请人 CANON INC 发明人 IWAMURA KEIICHI
分类号 G06F7/52;G06F7/523;G06F7/527;G06F7/53;G06F11/10 主分类号 G06F7/52
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