| 摘要 |
<p>A teletext clock synchronisation circuit in which the teletext signal is supplied as one input to an XOR gate and a clock signal at half the teletext signal frequency is applied to the XOR gate as its other input. The resulting output from the XOR gate is applied to an accumulator with a fixed number of teletext signal cycles and the accumulated value in the accumulator is used to alter the phase of the signal to be used to sample the teletext signal relative to the phase of the teletext signal. <IMAGE></p> |
