| 摘要 |
<p>PURPOSE: To secure reliability in the case of highly integrating a memory device by supplying a program preventing voltage through a column select transistor to a bit line during a program operation and impressing this program voltage to the gate of the column select transistor at such a time. CONSTITUTION: A program prevention circuit 200 supplies the program preventing voltage through a column select transistor TR 411 to a bit line BL during the program operation. Namely, a transmission circuit 214 of the circuit 200 is an NMOSTR linking a channel between a 1st voltage node 213 and the bit line BL and connecting the gate to a bit line select signal 204. Then, input data transmitted through a data input/output line and the bit line BL are sent out to a latch circuit 12. Thus, this circuit 212 is conducted only at the time of transmitting the input data but is not conducted at the time of erasure and programming.</p> |
