发明名称 PICTURE AND DATA MULTIPLEX CIRCUIT
摘要 <p>PURPOSE:To provide a picture and data multiplex circuit in which data can be reproduced without deteriorating a picture quality in a conventional decoder, and the erroneous detection of data by an encoding and decoding can be evaded. CONSTITUTION:Picture data divided into blocks of a specific size by a block dividing circuit 101 are transformed into encoding coefficients corresponding to frequency components by an orthogonal transformation circuit 102, and quantized by a preliminarily set numeric value by a quantizing circuit 104. Then, the other data are multiplexed on the high frequency component area of the encoding coefficients after quantization by a multiplex circuit 105.</p>
申请公布号 JPH0698175(A) 申请公布日期 1994.04.08
申请号 JP19920243273 申请日期 1992.09.11
申请人 SANYO ELECTRIC CO LTD 发明人 YAMAKITA YOSHINOBU
分类号 H03M7/30;G06T9/00;H04N1/387;H04N1/41;H04N7/08;H04N7/081;H04N7/24;H04N19/00;H04N19/423;H04N19/60;H04N19/625;H04N19/70;H04N19/85;(IPC1-7):H04N1/41;G06F15/66;H04N7/13 主分类号 H03M7/30
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