Semiconductor memory device having netlike power supply lines

摘要

A semiconductor memory device for minimizing the resistance attendant on reaching as far as each sense amplifier connected to a memory cell. A first plurality of power supply lines are alternatively disposed between column select lines which is formed over a plurality of lines of semiconductor memory device in a column direction. The first plurality of power supply lines the first plurality of ground lines are connected to a second plurality of power supply lines and a second plurality of ground lines which are disposed under the column select lines in a row direction, to thereby provide a netlike power supply structure. Consequently, the operating speed of a chip is improved by minimizing the resistance attendant on reaching as far as the sense amplifiers connected to each memory cell and the efficiency of the semiconductor memory device is greatly promoted by suppressing a coupling phenomenon caused between the column select lines.