| 摘要 |
A process of fabricating an insulated-gate field effect transistor includes step for forming a silicon gate electrode 5 on a gate insulation film 4 deposited over one surface of a p-type semiconductor substrate 10; forming n-type base regions 7 extending beneath the silicon gate electrode by introducing an n-type impurity into specified areas of the surface of the semiconductor substrate using the silicon gate electrode 5 as a mask, and then laterally diffusing the introduced impurity; forming a mask layer 8 on the silicon gate electrode; forming p-type source regions in the base regions 7 by introducing p-type impurity, with the silicon gate electrode 5 masked with the mask layer 8, into the specified areas of the surface of the semiconductor substrate, thereby portions in the base regions 7 beneath the silicon gate electrode 5 being defined as channel regions 12; forming a drain electrode 14 on the other surface of the semiconductor substrate 10. This process allows substantially only one impurity of the conductivity type (n-type in this case) to enter in the silicon gate electrode, thus contributing to making the resistance of this silicon gate electrode lower.
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