Semiconductor memory device with single data line pair shared between memory cell arrays.

摘要

A dynamic random access memory device has a data line pair (DL) shared between a plurality of memory cell arrays (21a/ 21b), and a column address decoder unit (22d) allows one of column selectors to couple one of the associated bit line pairs with the shared data line pair so that the data line pair is not increased together with the memory capacity. <IMAGE>