| 摘要 |
PURPOSE:To reduce the power consumption and circuit scale of the digital signal processor which performs IIR filter arithmetic. CONSTITUTION:For the IIR filter arithmetic, a precharge control circuit 30 controls a precharge circuit 5 when the output of a data bus 1 has the same value in successive instruction cycles so that the precharging of the data bus 1 is stopped in the instruction cycle following the successive instruction cycles. Consequently, the frequency of the precharging of the data bus 1 is decreased to reduce the power consumption and data are held on the data bus 1 in a non-precharging period to omit a conventional stand-by register, thereby decreasing the circuit scale. |
