发明名称 Semiconductor EEPROM using NAND cell structure, e.g. for control device or memory card - verifies that data have been written correctly into cells and repeats write program until all data are correct or max. number of repeats is reached
摘要 The checking device investigates the correct writing of data into one memory cell by the programming device after each data writing. An automatic control switches the programming device repeatedly when the checking device has determined that a datum is incorrectly written. The data write program is executed repeatedly with a number of repeats, which is smaller than a max. program executing number applied externally of the memory. Pref. the automatic control is designed so that it repeatedly writes and stores the externally applied max. program executing number. ADVANTAGE - Facility for detecting chip degradation and optimising number of write/erase processes externally.
申请公布号 DE4309814(A1) 申请公布日期 1993.09.30
申请号 DE19934309814 申请日期 1993.03.26
申请人 KABUSHIKI KAISHA TOSHIBA, KAWASAKI, KANAGAWA, JP 发明人 KATO, HIDEO, KAWASAKI, KANAGAWA, JP;NAKAI, HIROTO, YOKOHAMA, KANAGAWA, JP
分类号 G11C17/00;G11C16/02;G11C16/12;G11C16/16;G11C29/00;G11C29/12;G11C29/24;G11C29/50;G11C29/52;(IPC1-7):G11C16/02 主分类号 G11C17/00
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