发明名称 |
DATA OUTPUT BUFFER CIRCUIT WITH PRECHARGED BOOTSTRAP CIRCUIT |
摘要 |
A data output buffer circuit includes a pair of data lines respectively applied with a noninverted data signal and an inverted data signal and an output gate circuit for gating the noninverted and inverted data signals in response to an output enable signal. A pull-up/pull-down NMOS transistor pair is connected in series between a first supply voltage and a ground voltage. A supply voltage converter circuit generates a constant second supply voltage so long as said first supply voltage is above a predetermined minimum level. A bootstrap circuit is precharged by the second supply voltage for driving the pull-up NMOS transistor with a boosted voltage level when the non-inverted data signal is a logic "HIGH" state. The bootstrap circuit includes a first NMOS transistor, a main capacitor, a secondary capacitor, second and third NMOS transistors to precharge the secondary capacitor, an overcurrent limit circuit for limiting overcurrent into the secondary capacitor, a first CMOS inverter for transferring the boosted voltage from the main capacitor to a gate electrode of the pull-up transistor during the logic "HIGH" state, and for transferring the ground voltage during a logic "LOW" state, and a second CMOS inverter for transferring the second supply voltage to a second terminal of the main capacitor during the logic "HIGH" state, and for transferring the ground voltage thereto during the logic "LOW" state.
|
申请公布号 |
US5241502(A) |
申请公布日期 |
1993.08.31 |
申请号 |
US19910643285 |
申请日期 |
1991.01.22 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
LEE, JANG-KYU;JEONG, SEONG-WOOK |
分类号 |
G11C11/412;G11C5/14;G11C7/10;G11C11/409;H03K17/06;H03K19/00;H03K19/017;H03K19/0175;H03K19/094 |
主分类号 |
G11C11/412 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|