Transmission of information to all units of multiprocessor system - has simultaneous telegram containing identification address and data transmitted to all units

摘要

A number of processors that form a multiprocessor system are coupled on to a common bus and under specific conditions can be required to receive the same information. The information transmission is preceded by an address that consists of an identification block (K) that identifies it as a simultaneous transmission. This is followed by an address block (A) having a single bit identifying the processor. A final block (D) contains the data to be processed. ADVANTAGE - Reduces loading on system bus for simultaneous transmissions.