发明名称
摘要 <p>PURPOSE:To attain smooth communication by abolishing a signal transmitted from a synchronizing station in advance at a receiving side if the signal interferes with a transmitted signal in a loop transmission system comprising one synchronizing station and plural node stations. CONSTITUTION:The loop network is constituted with a clock station 7 and the node stations 1-6 so as to allow the station 7 to trnsmit a synchronizing signal to a loop 8 in a prescribed period. An interface section of the stations 1-6 is provided with a signal detecting circuit 14, a control circuit 13, a timer 17 and a receiving buffer 15 or the like, and the circuit 14 detects a destination address and a synchronizing signal or the like so as to reset the time 17 by using them. When the destination address detected by the circuit 14 is coincident with the own address, the circuit 13 starts a buffer 15 so as to receive a signal addressed to itself. When the timer 17 outputs a value larger than the predetermined time (difference between the period of the synchronizing signal and a propagation time) before the end of the reception of this signal block, the circuit 13 abolishes the signal block in the buffer 15.</p>
申请公布号 JPH0550179(B2) 申请公布日期 1993.07.28
申请号 JP19830055441 申请日期 1983.03.31
申请人 NIPPON ELECTRIC CO 发明人 SHIMIZU HIROSHI
分类号 H04L7/00;H04L12/433;(IPC1-7):H04L12/42 主分类号 H04L7/00
代理机构 代理人
主权项
地址