Manufacturing method of hyperfrequency field effect transistors.

摘要

A power transistor includes at least two semi-conductor layers (2.3) and two metallisations, source (4) and drain (5). A pit or drain recess (26) is made after the gate recess (14), deposition of the T gate (15) and partial masking with a dielectric (17), using the gate (15) as mask. Thus, the drain-side etching entails no source-side etching. Application to power transistors, for which the VDS is high. <IMAGE>