| 摘要 |
PURPOSE:To allow a VCO to generate clocks with frequency of wide range without extending the high frequency characteristics of a loop filter. CONSTITUTION:A phase detecting circuit 21 detects the phases of a data clock signal and a clock outputted from the VCO 25 and a formation circuit 22 forms control voltage corresponding to their phase difference. The control voltage is supplied to the VCO 25 through a loop filter 23 and an adder 24. On the other hand, control voltage corresponding to a frequency error between the data input signal and the clock is outputted from a frequency detecting circuit 26 and supplied to the VCO 2 through the adder 24. |
