| 摘要 |
PURPOSE:To inhibit writing in an EEPROM when a battery built in a personal computer becomes a low or zero battery state. CONSTITUTION:In a personal computer including the battery, the voltage capacity of the battery is previously detected. When the battery is not in the low battery state, a flag in a prescribed register is set up. A CPU judges the flag of the register and outputs a WRITE ENABLE signal to an inverter 39. An output signal from the inverter 39 is inputted to an OR circuit 41. A WRITE signal outputted from the CPU is inputted to another input terminal of the OR circuit 41. The OR circuit 41 finds out OR logic between both input signals. The output terminal of the OR circuit 41 is connected to the PGM terminal of the EEPROM 2. When an output signal from the OR circuit 41 is a low level, the EEPROM 2 is turned to a write enabled state. |
