发明名称 LAMINATED VARISTOR
摘要 <p>PURPOSE:To provide a laminated varistor which can reduce leak currents while lowering voltage. CONSTITUTION:A laminated varistor 1, which gets voltage nonlinear property at the interfaces between semiconductor ceramic layers 2 and inner electrodes 3 by piling the semiconductor ceramic layers 2 and inner electrodes 3 alternately to make a sintered body, is constituted. And glass layers 7 are interposed between the above ceramic layers 2 and the inner electrodes 3. Moreover, these glass layers 7 contain B, Si, and at least two kinds out of Pb, Bi, and Zn, and the thickness of the above glass layer is 0.3mum or below.</p>
申请公布号 JPH04318903(A) 申请公布日期 1992.11.10
申请号 JP19910113990 申请日期 1991.04.17
申请人 MURATA MFG CO LTD 发明人 UENO YASUSHI;NAKAYAMA AKIYOSHI;NAKAMURA KAZUYOSHI;YONEDA YASUNOBU;SAKABE YUKIO
分类号 H01C7/10 主分类号 H01C7/10
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