| 摘要 |
PURPOSE:To reduce power consumption, to make the circuit follow a high speed operation and to reduce the circuit scale by setting an operating clock frequency of a bit correlation discrimination circuit discriminating the correlation between two N-bit data series low. CONSTITUTION:The bit correlation deciding circuit is provided with an N-bit correlation device 4 comparing two data series to output N-sets of correlation signals representing the match or unmatch of each bit and N-sets of correlation deciding units 3 connected in cascade receiving the output of the device 4 respectively. Every time an input data is revised, the N-sets of correlation deciding units 3 are reset and each deciding unit 3 makes correlation decision according to a check pulse after reset to give a state change output to a next stage and the result of correction decision is obtained from the unit at the final stage. |
