发明名称 Semiconductor memory
摘要 A semiconductor memory comprises a reading circuit including a memory cell composed of a selection transistor and a memory transistor having a floating gate, a reading reference circuit having a dummy memory cell having the same construction as that of the memory cell, and a comparator for receiving and comparing an output of the memory cell of the reading circuit and an output of the dummy memory cell of the reading reference circuit. A voltage supply circuit applies a predetermined voltage to a control gate of a dummy memory transistor of the dummy memory cell so as to cause a drain current to flow through the dummy memory transistor. The output of the memory cell in a written condition is compared with the output of the dummy memory cell, and when the output of the memory cell in a written condition is consistent with the output of the dummy memory cell, a threshold voltage of the memory transistor in the written condition is estimated on the basis of the predetermined voltage applied to the control gate of the dummy memory transistor.
申请公布号 US5157626(A) 申请公布日期 1992.10.20
申请号 US19900616957 申请日期 1990.11.21
申请人 NEC CORPORATION 发明人 WATANABE, TAKESHI
分类号 G11C17/00;G11C16/06;G11C16/28 主分类号 G11C17/00
代理机构 代理人
主权项
地址