发明名称 INTERFACE CONTROL CIRCUIT
摘要 <p>PURPOSE:To normally execute both an initializing processing and the DMA transfer of an input data even when a data strobe signal is inputted in the middle of initializing execution. CONSTITUTION:When the data strobe signal is inputted in the middle of the initializing execution, the data strobe signal is held by a flip-flop 16 and until an inside initializing request signal is turned to an ungenerated state, the start of a DMA controller 18 is inhibited by an AND gate 17. Then, when the inside initializing request signal is turned to the ungenerated state, the held data strobe signal is transmitted to the DMA controller 18 and data transfer is executed. Therefore, the initializing processing is not interrupted, and both the initializing processing and the data transfer processing can be normally executed.</p>
申请公布号 JPH04270439(A) 申请公布日期 1992.09.25
申请号 JP19910030970 申请日期 1991.02.26
申请人 TOSHIBA CORP 发明人 NAKAMURA NORIMASA
分类号 G06F1/24;G06F13/28 主分类号 G06F1/24
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