发明名称 Dual port memory for data transmission between two multiprocessor systems - operates via two input-output ports and is simultaneously accessible by both systems
摘要 The dual port memory permits data transmission between two systems via two input and output ports, with simultaneous access from the two systems. It has a memory cell array (10) with numerous cells and two memory cell selectors (11a, b) for selection of a memory cell in the array according to address data of the two respective systems. There is a read-out data release prohibition circuit (16a, 62) acting on the selected memory cells. The prohibition pref. concerns the data supply to one of the two systems, or to both simultaneously. It may also block the read-out from all cells of the array. The prohibition circuit may have a gate (16a) as a buffer for the read-out data, and a control (62, 63) for opening and closing of the gate. USE/ADVANTAGE - For data transmission between multi-processor systems, without need for change of programs in host system.
申请公布号 DE4204119(A1) 申请公布日期 1992.08.13
申请号 DE19924204119 申请日期 1992.02.12
申请人 MITSUBISHI DENKI K.K., TOKIO/TOKYO, JP 发明人 NAKAJIMA, TOYOKATSU;SUGITA, MITSURU, ITAMI, HYOGO, JP
分类号 G06F12/00;G11C8/16;G11C11/41 主分类号 G06F12/00
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