发明名称 Bus access control in multiprocessor system - has unit that handles requests and determines distribution and order of handling
摘要 A multiprocessor system has a number of units designated as bus masters, together with a number designated as slave units. All units are connected to the system bus. The bus master units connect with a common main distribution logic units via bus interface control logic. Each bus master initiates a request for access to the bus and this is handled by the distribution logic unit. Requests are latched into registers coupled to logic that assigns the order of handling. ADVANTAGE - Reduced complexity and cost.
申请公布号 DE4131227(A1) 申请公布日期 1992.04.02
申请号 DE19914131227 申请日期 1991.09.19
申请人 SUNDSTRAND DATA CONTROL, INC., REDMOND, WASH., US 发明人 DER ERFINDER WIRD NACHTRAEGLICH BENANNT
分类号 G06F13/364 主分类号 G06F13/364
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