发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To make high integration and high capacity possible without impeding high-speed operation of a dynamic type RAM or the like by making a pair of common source lines to be crossed by the respective sense amplifiers a plurality of times each. CONSTITUTION:A source of a P-channel MOSFET of a unit amplification circuit UDAO to USAn constituting one side (the other side) dividing sense amplifier ASUOA to DSU7A, DSLOA to DSL7A (DSUOB to DSU7B, DSLOB to DSL7B) making a pair the sense amplifier SAU and SAL, is commonly connected to a common source wire S1 (S2), while a source of an N-channel MOSFET is commonly connected to a common source line S2 (S2). As a result, the common source lines S1 and S2 are to be practically crossed in the middle of the neighboring dividing sense amplifiers. Accordingly, the potential change can be quickened having parasitic resistance and capacity of the common source line as a distribution constant.
申请公布号 JPH0453163(A) 申请公布日期 1992.02.20
申请号 JP19900157535 申请日期 1990.06.18
申请人 HITACHI LTD;HITACHI VLSI ENG CORP 发明人 KEMIZAKI KANEHIDE
分类号 G11C11/409;G11C11/401;H01L21/8242;H01L27/10;H01L27/108 主分类号 G11C11/409
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