发明名称 MEMORY CIRCUIT HAVING A REDUNDANT MEMORY CELL ARRAY FOR REPLACING FAULTY CELLS
摘要 Here is disclosed a memory circuit having a regular memory cell group, a redundant memory cell group, and an improved redundant decoder circuit for selecting the redundant memory cell group is there is any defect in the regular memory cell group. The redundant decoder circuit includes first and second programming circuits, and it is inoperative when the first programming circuit has not been programmed, operative when the first program element has been programmed and the second programming circuit has not been programmed, and inoperative when the second program circuit has been programmed.
申请公布号 US5058059(A) 申请公布日期 1991.10.15
申请号 US19900528986 申请日期 1990.05.25
申请人 NEC CORPORATION 发明人 MATSUO, MASAHIKO;NAKAIZUMI, KAZUO
分类号 G11C11/413;G11C11/401;G11C29/00;G11C29/04 主分类号 G11C11/413
代理机构 代理人
主权项
地址