发明名称 DIVERSITY SYNTHESIS CIRCUIT AND DIVERSITY SYNTHESIS METHOD
摘要 PROBLEM TO BE SOLVED: To obtain a diversity synthesis circuit and a diversity synthesis method where a diversity receiver using an equalizer applied to a propagation line with fading always detects and monitors a signal level of each route and keeps a signal level after the synthesis. SOLUTION: A level reduction detection circuit 102(102a, 102b) detects presence of an input signal of transversal equalizers 101a, 101b of each route, a logic arithmetic circuit 105 output a signal denoting whether or not a level of a synthesis signal is controlled to an amplifier 104 on the basis of the detection result. Similarly an amplifier 107, a level reduction detection circuit 108 and a logic arithmetic circuit 109 control a signal after processed by a synthesizer 106. Since the signal level is controlled by the amplifier after the synthesis at interruption of the signal, saturation of the amplifier attended with remarkable fluctuation in a tap weight of the equalizer can be prevented and the amplifier can be operated at an optimum operating point at all times.
申请公布号 JP2000183794(A) 申请公布日期 2000.06.30
申请号 JP19980353112 申请日期 1998.12.11
申请人 NEC CORP 发明人 SONODA HIDEAKI
分类号 H04B7/005;H04B7/08;(IPC1-7):H04B7/08 主分类号 H04B7/005
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