| 摘要 |
PURPOSE:To attain an operation without causing a reception error even when a data delay is changed by taking bit phase synchronization of a received data signal after the operating state of other bit phase synchronizing circuit is revised while taking bit phase synchronization of the received data signal with one bit synchronizing circuit. CONSTITUTION:At first, a bit synchronizing circuit 101 is used by the control of a control circuit 103 to take bit synchronization and a selector 105 uses the control circuit 103 to be switched to the position of the bit synchronizing circuit 101. While a data signal is received in this state, and a bit synchronizing circuit 102 varies the delay in the data signal and the erroneous state of the data is monitored in each delay and the remotest phase is decided from an uncertain area of the data signal. In this state, the outputs of the bit synchronizing circuits 101, 102 are compared by an EXOR 104 and when they are coincident, the selector 105 is switched to the position of the bit synchronizing circuit 102. Thus, erroneous reception of the data signal is prevented even at the switching. |
