| 摘要 |
PURPOSE:To enable the lithography to be fined for expanding the formation space of the other circuits thereby improving the integration of the cell plate electrode structure by a method wherein the cell regions previously studded are putted in a line to increase the cell plate vacant regions. CONSTITUTION:A cell plate electrode 7 jointly owned by the cell capacitors 1, 2 of adjacent two memory cells is connected to cell capacitors 4, 5 on one diagonal line but disconnected to the other cell capacitors 3, 6 on the other diagonal line by the vacant regions 111, 112 of the cell plate electrode 7. However, the cell capacitors 3, 6 are connected to each other at any other pertinent positions to equalize the potentials thereof. Consequently, the vacant regions of the electrode 7 can be increased to facilitate the constitution of the other circuits simultaneously putting cell regions 81, 82 and 83, 84 in a line to facilitate the etching process while enabling the lithography to be fined. |
