| 摘要 |
A semiconductor integrated circuit with a wiring arrangement for high integration density. The arrangement is dispersed on a semiconductor substrate with a first wiring portion formed on the substrate and a second wiring portion formed on the substrate at a location adjacent to one edge of the first wiring portion. The first wiring portion has a groove or a plurality of indentations formed therein, preferably in the vicinity of the edge thereof that is closer to the second wiring portion, for preventing short-circuiting between the first and second wiring portions through parts of the edge of the first wiring portion which have expanded during a heat treatment.
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