发明名称 SPEED CONTROLLER
摘要 PURPOSE:To enable a device to be stably worked to set high frequency, by estimating a momentary value at a counting time point, through an average speed measured at each counting time point with an average speed counting means, and a measured value before the time point, and by computing an estimated error data through the estimated value. CONSTITUTION:When the leading edge of the output signal of a frequency multiplier circuit 4 to which the input of speed pulse signal FG is provided is set in an incoming state, then the count value of a counter 9 is stored in memory 11, and a data stored in the memory 11 till the time is stored in memory 12. By an estimation unit 13, through a storage data in the memories 11, 12, a momentary value at the time point is estimated. Then, from an adder 14, a deviation between the output of the estimation unit 13 and a reference value is fed to a motor driving circuit 8 via a digital filter 6 and a D-A converter 7. As a result, a device can be stably worked to set high frequency.
申请公布号 JPH01126187(A) 申请公布日期 1989.05.18
申请号 JP19870282436 申请日期 1987.11.09
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MIZUGUCHI HIROSHI
分类号 H02P29/00;H02P5/00;H03H17/02 主分类号 H02P29/00
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