发明名称 Loop filter for a phase-locked loop and method for switching
摘要 A phase-locked loop having a phase detector for receiving a feedback signal and an input clock signal having an input clock frequency. The phase detector outputs or produces a phase error signal indicative of a comparison between the input clock signal and the feedback signal. The phase-locked loop also has a loop filter coupled to the phase detector to receive the phase error signal and to output an error correction signal which includes an error correction frequency having a value ranging from about [input clock frequency-(input clock frequencyxabout 0.00015)] to about [input clock frequency+(input clock frequencyxabout 0.00015)]. A voltage controlled oscillator is coupled to the loop filter for receiving the error correction signal and to generate an output signal of the phase-locked loop which is indicative of the feedback signal. A method for operating a phase-locked loop circuit is provided along with a filter circuitry for a phase-locked loop and a method for filtering a phase error signal.
申请公布号 US6806751(B2) 申请公布日期 2004.10.19
申请号 US20020243193 申请日期 2002.09.12
申请人 FOUNDRY NETWORKS, INC. 发明人 HELFINSTINE CHARLES ALLEN
分类号 H03L7/093;H03L7/10;(IPC1-7):H03L7/00 主分类号 H03L7/093
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