发明名称 MOS-TYPE FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To obtain a current value and a breakdown strength desirable so as to get a MOS-FET of a prescribed characteristic comparatively with ease by a method wherein the channel formed just under a gate electrode is rendered variable in length and an n<-> type diffusion layer provided just under a drain electrode is rendered also variable in concentration and length. CONSTITUTION:The difference between the lateral spread of a p-type diffusion layer and an n<+>type diffusion layer 6 both just under a gate electrode 3 is a channel 7. The current value can be varied by adjusting the channel 7 in length. An n<-> type diffusion layer 8 and a n<+> type diffusion layer 9 are formed by performing ion implantation through the window provided at different part of a surface insulating film on the semiconductor substrate 1. This is a so-called offset structure, where the breakdown strength can be controlled by adjusting an n<->type diffusion layer 8, just under a gate electrode 3, in concentration and broadwise length. By these processes, a process that forms an element directly on a substrate can be performed with ease and at low cost without an epitaxial layer or a buried layer or the like and both a large current and a high breakdown length are can be obtained.
申请公布号 JPS63275180(A) 申请公布日期 1988.11.11
申请号 JP19870111811 申请日期 1987.05.07
申请人 NEC CORP 发明人 KANEKO KAZUO
分类号 H01L29/10;H01L29/78 主分类号 H01L29/10
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