发明名称 DEFICIENCY CHECKING FOR MULTICHIP MODULE
摘要 PURPOSE:To facilitate diagnosis of a trouble, especially diagnosis at a bump connection, by switching the operation to the detection circuit position for checking the bump connection and a mother board with a switching circuit after the diagnosis of a chip. CONSTITUTION:Logic circuits (as indicated by logics S1-Sn composing a system) 21 and wires 22 and switching circuits 23 acting as detection circuit are arranged in chips 3 at a multichip module. Checking of the logic circuits 21 in the chips 3 is made possible, for example, by a probe inspection keeping a probe needle in contact with a bump 2 and the chips 3 are connected to a mother board when the results of the inspection turn out to be favorable. After the connection, the switching circuits 23 in the chips 3 are operated to turn an input of a signal for inspection to the wire 22 position. As the switching circuits 23 are provided in the chips 3, switching between the logic circuits 21 and the detection circuits is possible within the chips 3. In other words, this enables the separation between the diagnosis of chips and that of a bump section and the mother board in the diagnosis of a system.
申请公布号 JPS63151876(A) 申请公布日期 1988.06.24
申请号 JP19860298722 申请日期 1986.12.17
申请人 HITACHI LTD 发明人 KATO HIROMASA
分类号 G01R31/28;G01R31/3185 主分类号 G01R31/28
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