| 摘要 |
PURPOSE:To shorten a discharging time by discharging the charge of an output terminal contact after discharging the contact charge between the earthing terminals of a NOR gate to constitute a column line selecting gate circuit, in a dynamic RAM to select the row line and the column line of a memory cell matrix according to the timing signal of a row system and of a column system. CONSTITUTION:A first precharge signal P1 is made into a non-active state immediately after the activation of the control signal of the row system, the inverse of RAS, and the contact N2 at the earthing terminal side of the NOR gate consisting of transistors (TRs) Q4-Q6 is isolated from a power source by the TR Q1. Next, the TR Q2 is made to be conductive by a column decoder activating signal Ac which is activated at a timing during a time since the control signal of the row system, the inverse of RAM is activated until the control signal of a column system CAS is activated, and further, after a row address activating signal AA4dR goes to non-active, and the charge of the contact N2 is discharged. Next, the contact N1* of the gate output terminal is isolated from the power source by a second precharge signal P2, and the charge of the contact N1 is discharge as well by the TRs Q4-Q6 to which an address signal AD is inputted.
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