发明名称 MEMORY EXPANDING CIRCUIT FOR CPU
摘要 PURPOSE:To make effective use of each memory bank by providing a data latch circuit and a data distributing circuit in an interruption control circuit and making it possible to expand the capacity of a main memory bank by the capacity of a sub-memory bank by an arbitrary program, and at the same time, checking overflow of a stack memory. CONSTITUTION:Data for switching a sub-memory bank 25 is latched, and a specific bit of the latched data is inputted to the receiving terminal 30 of an interruption control terminal as an interrupt request signal. Other bits of latched data are inputted to an input gate circuit 29 as an identification code signal. Thereby, it is made possible to expand the capacity of a main memory bank 24 by the capacity of the sub-memory bank 25 by an arbitrary program. Further, the first register 43 that stores the same value with a register for a stack pointer, the second register 44 that stores a predetermined limit value and a comparator 45 that outputs an alarm signal to a CPU when the stored value of the first register exceeds the limit value are provided to prevent overflow of a stack memory.
申请公布号 JPS6336340(A) 申请公布日期 1988.02.17
申请号 JP19860177721 申请日期 1986.07.30
申请人 ANRITSU CORP 发明人 TAKANO HIROSHI
分类号 G06F9/48;G06F12/06;G06F13/16 主分类号 G06F9/48
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