| 摘要 |
PURPOSE:To make the retransfer of an initial address unnecessary if accesses in the same address area continue by taking an address, which is stored in a memory means under the same condition when an access to a next memory starts, for an initial address. CONSTITUTION:A latch is installed before the input part of a length counter 412, and fetches inner data. When a master MPU writes data at an address xxx2 in order to set data to the counter 412, the clock signal of the latch comes to '1', and the latch fetches data. When consecutively the master MPU writes data in a command register 413, the signal becomes zero, and the counter 412 agains fetches data from the latch. Thanks to the circuit, data is set to an address counter 412 and the counter 412 only once before this step, and in a next step data setting is unnecessary. By providing this circuit the burden imposed on the master MPU is lightened.
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